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| DM74ALS374 Octal 3-STATE D-Type Edge-Triggered Flip-Flop September 1986 Revised February 2000 DM74ALS374 Octal 3-STATE D-Type Edge-Triggered Flip-Flop General Description This 8-bit register features totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provides this register with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. It is particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the DM74ALS374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Features s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin-for-pin compatible with LS TTL counterpart s Improved AC performance over DM74LS374 at approximately half the power s 3-STATE buffer-type outputs drive bus lines directly Ordering Code: Order Number DM74ALS374WM DM74ALS374SJ DM74ALS374N Package Number M20B M20D N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Connection Diagram (c) 2000 Fairchild Semiconductor Corporation DS006113 www.fairchildsemi.com DM74ALS374 Function Table Output Control L L L H L = LOW State H = HIGH State X = Don't Care = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q Clock L X D H L X X Output Q H L Q0 Z Logic Diagram www.fairchildsemi.com 2 DM74ALS374 Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range (Note 2) Typical JA N Package M Package 60.0C/W 79.0C/W 7V 7V 5.5V 0C to +70C -65C to +150C Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: This product meets application requirements of 500 temperature cycles from -65C to +150C. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLOCK tW tSU tH TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Clock Frequency Width of Clock Pulse Data Setup Time (Note 3) Data Hold Time (Note 3) Free Air Operating Temperature HIGH LOW 0 14 14 10 0 0 70 Parameter Min 4.5 2 0.8 -2.6 24 35 Nom 5 Max 5.5 Units V V V mA mA MHz ns ns ns ns C Note 3: The () arrow indicates the positive edge of the Clock is used for reference. DC Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C. Symbol VIK VOH VOL II IIH IIL IO IOZH IOZL ICC Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Current @ Max. Input Voltage HIGH Level Input Current LOW Level Input Current Output Drive Current OFF-State Output Current, HIGH Level Voltage Applied OFF-State Output Current, LOW Level Voltage Applied Supply Current VCC = 5.5V Outputs Open Outputs HIGH Outputs LOW Outputs Disabled 11 19 20 VCC = 5.5V, VO = 0.4V VCC = 5.5V, VIH = 2.7V VCC = 5.5V, VIL = 0.4V VCC = 5.5V VCC = 5.5V, VO = 2.7V VO = 2.25V -30 VCC = 5.5V, VIH = 7V VCC = 4.5V VCC = 4.5V to 5.5V VCC = 4.5V Conditions VCC = 4.5V, II = -18 mA IOH = Max IOH = -400 A IOL = 12 mA IOL = 24 mA 2.4 VCC - 2 0.25 0.35 0.4 0.5 0.1 20 -0.2 -112 20 -20 19 28 31 3.2 Min Typ Max -1.5 Units V V V V V mA A mA mA A A mA mA mA 3 www.fairchildsemi.com DM74ALS374 AC Electrical Characteristics Symbol fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Maximum Clock Frequency Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to HIGH Level Output Output Enable Time to LOW Level Output Output Disable Time from HIGH Level Output Output Disable Time from LOW Level Output Conditions VCC = 4.5V to 5.5V RL = 500 CL = 50 pF Clock Clock Output Control Output Control Output Control Output Control Any Q Any Q Any Q Any Q Any Q Any Q From To Min 35 3 5 5 7 2 3 12 16 17 18 10 18 Max Units MHz ns ns ns ns ns ns www.fairchildsemi.com 4 DM74ALS374 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com DM74ALS374 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 DM74ALS374 Octal 3-STATE D-Type Edge-Triggered Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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